Decoding Mapping Functions for High-Rate LDPC Codes
Abstract: For LDPC codes, including those used in NAND flash memories, the bit-error rate performance is closely tied to the number of bits used to represent each message in the message-passing decoder. In this work, we describe a systematic method to generate mutual-information maximizing message-passing decoding mappings. Numerical results show that using 3 and 4 bits per message is sufficient to obtain excellent error-rate performance in the binary symmetric channel (BSC) and in the AWGN channel.
Bio: Francisco Javier Cuadros Romero received the B.S. degree from the University of Hidalgo State, Mexico in 2010 and the M.Sc. degree from the National Polytechnic Institute, Mexico, in 2013. He was an exchange student at University of ElectroCommunications in Tokyo, Japan, from 2011 to 2012. In 2013, he became a research student in the School of Information Science at Japan Advanced Institute of Science and Technology (JAIST), where he is currently a Ph.D. candidate.