OrganizersDr. Moinuddin K Qureshi (IBM Research)
Prof. Sudhanva Gurumurthi (University Of Virginia)
Dr. Bipin Rajendran (IBM Research)
AbstractMemory systems consisting of DRAM chips are starting to hit cost and power limits. This has prompted architects to turn to emerging memory technologies to build large capacity, scalable, and power efficient memory systems. Phase Change Memory (PCM) is being viewed as one of the most promising candidates among the emerging technologies and research studies on PCM have started to gain attention in Computer Architecture conferences. Yet, there is little understanding about the fundamental physics and behavioral modeling of PCM in the wider architecture community. The objective of this tutorial is to explain the device level working of phase change memory and provide architectural level abstractions to enable their use for system studies. We will also cover the potential uses of PCM in systems that can leverage the density advantage, power-efficiency, and non-volatility of PCM. PCM has it own unique challenges such as slower read latency (than DRAM), much slower write latency (and write bandwidth), limited write endurance and drift. We will survey existing solutions to these problems and discuss topics for future research.
For more information on the tutorial, click here