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NVMW 2011

Program

The program below is preliminary and may change before the workshop.
A printable version of the schedule can be found here.
A printable version of the program can be found here.

Sunday, March 6

Tutorial
Atkinson Hall - Calit2
12:30pm - 5:00pm

Reception
Sheraton Hotel - The Grove
6:00pm - 9:00pm


Monday, March 7

Continental Breakfast
Atkinson Hall - Calit2 Pre-Function Area
8:00am - 8:45am

Opening Remarks
Calit2 Auditorium
8:45am - 9:00am

Keynote
Prof. Jehoshua (Shuki) Bruck, Caltech
9:00am - 10:00am

Break
10:00am - 10:45am

Session I: Devices
Atkinson Hall - Calit2 Auditorium

Spintronics-Based Logic Circuits Using Magnetic Tunnel Junctions
, University of Minnesota
, Shruti Patil
Slides
Recent progress on oxide based memristive devices in HP
, HP Labs
, J. Joshua Yang, M. Zhang, J. P. Strachan, J. Borghetti, M. D. Pickett, F. miao, Q. Xia, D. A. A. Ohlberg, J. H. Nickel, G. M. Ribeiro
Slides
1T-1STT MTJ Memory Arrays for Embedded Applications
, Intel
, Arijit Raychowdhury, Dinesh Somasekhar, James Tschanz, Vivek De
Slides
Latest Advances in STT-RAM


Slides
10:45am - 12:05pm

Lunch/Poster Session
Calit2 - Atkinson Hall
12:05pm - 1:45pm

Session II: ECC I
Calit2 Auditorium

Error Characterization for NAND Flash Memories
, DSSC, Carnegie Mellon University∗, , LSI Corporation†,
, Yu Cai∗, Erich F. Haratsch†
Slides
Some Limited Magnitude Error Correcting Codes for Flash Memories
, Oregon State University∗, , University of Bergen†,
, Bella Bose∗, Torleiv Klove†
Error Correction Scheme for Constrained Inter-Cell Coupling in Flash Memory
, Technion - Israel Institute of Technology
, Amit Berman
Slides
Adaptive Endurance Coding for NAND Flash
, IBM TJ Watson Research
, Ashish Jagmohan, Michele Franceschini, Luis A. Lastras-MontaƱo
Slides
Session III: Architecture
CSE Bldg., Room 1202

Janus-FTL: Finding the Optimal Point on the Spectrum Between Page and Block Mapping Schemes
, University of Seoul∗, , Hongik University†, , Dankook University‡,
, Hunki Kwon∗, Eunsam Kim†, Jongmoo Choi‡, Donghee Lee∗
Slides
Sub-block Wear-leveling for NAND Flash
, IBM Research, Zurich Research Laboratory
, Roman Pletka, Xiao-Yu Hu, Ilias Iliadis, Roy Cideciyan
Slides
Exploiting Memory Device Characteristics at the System Level: from Adaptive SSD to Self-Healing SSD
, RPI
, Qi Wu, Yangyang Pan, Guiqiang Dong
Slides
Leveraging Value Locality in Optimizing NAND Flash-based SSDs
, Department of Computer Science and Engineering, The Pennsylvania State University, University Park 16802, PA.
, Aayush Gupta, Raghav Pisolkar, Bhuvan Urgaonkar
1:45pm - 3:05pm

Break
3:05pm - 3:50pm

Session IV: Devices
Calit2 Auditorium

ENERGY EFFICIENT CIRCUIT-SYSTEM CODESIGN FOR SPIN TORQUE TRANSFER RANDOM ACCESS MEMORY (STTRAM) IN SUBMICRON TECHNOLOGIES
, georgia tech∗, , case western reserve†,
, subho chatterjee∗, saibal mukhopadhyay∗, mitchelle rasquinha∗, sudhakar yalamanchili∗, swarup bhunia†
Slides
Model Based Study on Performance and Energy Optimization for STT-RAM
, University of Virginia
, Anurag Nigam, Kamaram Munira, Avik W. Ghosh, Stuart Wolf
Slides
Handling PCM Resistance Drift with Device, Circuit, Architecture, and System Solutions
, University of Utah∗, , IBM†,
, Manu Awasthi∗, Manjunath Shevgoor∗, Kshitij Sudan∗, Rajeev Balasubramonian∗, Bipin Rajendran†
Slides
Probabilistic Programming of STT-MTJ Clusters
, Qualcomm Inc.
, Wenqing Wu, Xiaochun Zhu, Seung Kang, Kendrick Yuen, Matt Nowak, Jeff Levin, Rob Gilmore
Slides
Session V: Applications
CSE Bldg., Room 1202

SSDAlloc: Hybrid SSD/RAM Memory Management Made Easy
, Princeton University
, Anirudh Badam
Slides
Pathological Behavior of SSDs and Application in HPC Storage
, Oak Ridge National Laboratory∗, , Georgia Institute of Technology†,
, Youngjae Kim∗, Junghee Lee†
Slides
ChunkStash: Speeding up Storage Deduplication using Flash Memory
, Univ. of Minnesota∗, , Microsoft Research†,
, Biplob Debnath∗, Sudipta Sengupta†
Slides
Opportunities and Challenges of Using Solid State Drives in Large Scale Datacenters
, Microsoft
, Badriddine Khessib, Kushagra Vaid, Sriram Sankar
3:50pm - 5:10pm

Banquet
Sheraton Hotel - The Coast Ballroom
6:00pm - 9:15pm


Tuesday, March 8

Breakfast
Atkinson Hall - Calit2 Pre-Function Area
8:15am - 9:00am

Keynote
C. Mohan, IBM Fellow and Former IBM India Chief Scientist
9:00am - 10:00am

Break
10:00am - 10:45am

Session VI: Arch II
Calit2 Auditorium

Advances in wear leveling for storage class memories
, IBM T.J. Watson Research Center
, Moinuddin K. Qureshi, Michele Franceschini, Luis Lastras
Moneta: A High-performance Storage Array Architecture for Next-generation, Non-volatile Memories
, UCSD
, Adrian M. Caulfield, Arup De, Joel Coburn, Todor I. Mollov, Rajesh K. Gupta
Slides
PTRIM + EXISTS: Exposing New FTL Primitives to Applications
, FusionIO
, David Nellans, Michael Zappe, Jens Axboe
Designing with STT-RAM: From Disks to Dies
, University of Virginia
, IV Clinton W. Smullen
Slides
Session VII: ECC II
CSE Bldg., Room 1202

Sum Capacity of the Multiple-Write Memory
, University of California, San Diego
, Lele Wang
Slides
FREE-p: Protecting Non-Volatile Memory Against both Hard and Soft Errors
, The University of Texas at Austin∗, , Hewlett-Packard Labs†,
, Doe Hyun Yoon∗, Naveen Muralimanohar†, Jichuan Chang†, Parthasarathy Ranganathan†, Norman P. Jouppi†
Slides
Coding for limiting current in memristor crossbar memories
, HP Labs∗, , Technion and HP Labs†,
, Erik Ordentlich∗, Gilberto Ribeiro∗, Ron M. Roth†, Gadiel Seroussi∗
Slides
Coding with Side Information for Flash Memory Endurance
, Carnegie Mellon University
, Euiseok Hwang, Seungjune Jeon, Rohit Negi
Slides
10:45am - 12:05pm

Lunch/Poster Session
Calit2 - Atkinson Hall
12:05pm - 1:15pm

Session VIII: Applications
Calit2 Auditorium - Atkinson Hall

Storage Systems for Storage-Class Memory
, University of Wisconsin
, Haris Volos
Slides
Redesigning Data Structures for Non-Volatile Byte-Addressable Memory
, University of Illinois, Urbana-Champaign∗, , Maginatics†, , HP Labs, Palo Alto‡,
, Shivaram Venkataraman∗, Niraj Tolia†, Parthasarathy Ranganathan‡
Slides
Traversing Massive Graphs with NAND Flash
, Texas A&M University∗, , Lawrence Livermore National Laboratory†,
, Roger Pearce∗, Maya Gokhale†
Database software for non-volatile byte-addressable memory
, HP Labs
, Goetz Graefe
Slides
1:15pm - 2:35pm

Break
2:35pm - 2:50pm

CalIT2 Tour
2:50pm - 4:50pm


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